Evaluating System on a Chip Design Security
Abstract:
In this paper, the security of an increasingly popular concept called System on a Chip (SoC) is considered. SoC consists of pairing a Field Programmable Gate Array (FPGA) and a processor on a single chip. The researchers contend that security is permanently influenced by initial design decisions; and, if aware of the trade-offs, designers incorporating SoCs into their systems can improve security of their applications. Previous publications on design guidance focus on capabilities and implementation details without addressing system-level security decisions or offering advice on meeting security goals. This paper helps to evaluate the security requirements and recommends varied levels of protections.
AUTHORS
Department of Electrical and Computer Engineering Air Force Institute of Technology Wright-Patterson Air Force Base
Dayton,OH, U.S.A.
Patrick Reber is a First Lieutenant in the U.S. Air Force. He earned a bachelor’s degree in Electrical Engineering from Embry- Riddle Aeronautical University, and a master’s degree in Electrical Engineering (with an emphasis on Cyber-Physical System [CPS] security) from the Air Force Institute of Technology.
Department of Electrical and Computer Engineering Air Force Institute of Technology Wright-Patterson Air Force Base
Dayton,OH, U.S.A.
Dr. Scott Graham is an Assistant Professor of Computer Engineering at the Air Force Institute of Technology. He earned a doctorate in Electrical Engineering from the University of Illinois at Urbana-Champaign in 2004. His research interests focus on Cyber-Physical Systems (CPSs), the interaction of computer architecture, networks, and security for critical infrastructure protection. His current focus is on vehicle cyber security, both within and between vehicles.
Published In
Journal of Information Warfare
The definitive publication for the best and latest research and analysis on information warfare, information operations, and cyber crime. Available in traditional hard copy or online.
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